1. Field of the Invention
The present invention relates to a bit error detecting circuit used in a control circuit for selecting a channel of lower bit error rate in a diversity communication system or the like, and more particularly to a bit error detecting circuit for a digital signal transmission line, having pseudo bit error detecting means for the prediction of any fault in the transmission.
2. Prior Art
In an analog signal transmission line, the quality of the signal being transmitted is affected directly by the decrease in the gain of the transmission line or the increase in the noise level, so that it is easy to monitor a fault on the transmission line. In contrast, in a digital signal transmission line, the high degree of noise-immunity of the transmission line makes the monitoring of the fault more difficult. In other words, a fault on the digital signal transmission line cannot be detected until the bit error occurs so frequently that the quality of the transmitted signal is heavily deteriorated at the time that the fault is detected. This means that a higher accuracy is required for the digital signal transmission with respect to the fault detection than the analog signal transmission. That is to say, the detection of the fault on the digital signal transmission line requires a system in which the fault on the transmission line is detected to take recovery steps such as channel switching prior to the deterioration of the quality of the signal.
To monitor the digital signal transmission line, use has been widely made of a method in which a pilot pulse or a frame synchronization pulse included in the transmitted signal is detected. While this method has a high reliability of the detection, fault detection cannot be achieved with it. More definitely, at the the time a bit error is beginning to occur in the frame synchronization pulse, the quality of the transmitted digital signal is deteriorated as much as the frame synchronization pulse, making the above-mentioned prediction impossible. To realize the prediction function, a system has been proposed in which a monitoring decision circuit is provided independently of the decision circuit for the signal reproduction and in which the threshold level for the binary code decision is shifted either upwards or downwards with respect to a reference voltage (for example, ground potential) in the process of reproducing the transmitted digital signal, so that a pseudo bit error is detected by the monitoring decision circuit (Reference is made to "Microwave Radio Equipment for Highly-Reliable Digital Communication System" by Seijiro Yokoyama et al, NEC RESEARCH & DEVELOPMENT, No. 39, pp. 1-11, October 1975 ).
The conventional bit error prediction technique outlined above has advantages such that even a slight fault on the transmission line can be detected and that desired recovery steps can be taken before the fault results in a sudden deterioration of the quality of the transmitted signal. On the other hand, however, the sensitivity of this detecting circuit for pseudo bit errors is apt to be varied due to the drift of the threshold level in the monitoring decision circuit. Such variation in the sensitivity adversely affects the prediction function directly, making the pseudo error detection unreliable.